Miniature, two-dimensional thin-film microbatteries are known in the art. For example, U.S. Pat. Nos. 5,338,625 and 5,567,210, whose disclosures are incorporated herein by reference, describe a thin-film microbattery used as a backup or primary integrated power source for electronic devices. The battery includes a lithium anode, an electrochemically-stable electrolyte and a vanadium-oxide cathode. The battery is fabricated directly onto a semiconductor chip, onto the semiconductor die or onto a portion of the chip carrier.
U.S. Pat. No. 6,610,440, whose disclosure is incorporated herein by reference, describes microscopic batteries that are integratable or integrated with micro-electromechanical (MEMS) systems or other microscopic circuits. The inventors describe closed system microscopic batteries used for internal storage of electricity using interval reactants. The batteries comprise microscopic electrodes, electrolyte and a reservoir for the electrolyte.
A three-dimensional thin-film microbattery is described in U.S. Pat. No. 6,197,450, whose disclosure is incorporated herein by reference. Thin-film micro-electrochemical energy storage cells (MEESC) such as microbatteries and double-layer capacitors (DLC) are described. The energy storage cells comprise two thin layer electrodes, an intermediate thin layer of a solid electrolyte and an optional fourth thin current collector layer. The layers are deposited in sequence on a surface of a substrate. The substrate comprises multiple through cavities of arbitrary shape, with high aspect ratio, which increase the total electrode area per volume ratio.
3-D microbatteries are also described by Long et al., in “Three-Dimensional Battery Architectures,” Chemical Review, volume 10, number 104, October, 2004, pages 4463-4492, which is incorporated herein by reference.
Geometric configurations of 3-D microbatteries are described by Hart et al., in “3-D Microbatteries,” Electrochemistry Communications, volume 5, 2003, pages 120-123, which is incorporated herein by reference. The paper presents finite-element simulations showing current and potential distribution for several cathode-anode array configurations.
A method for producing arrays of cavities in silicon is described by Kleimann et al., in “Formation of Wide and Deep Pores in Silicon by Electrochemical Etching,” Materials Science and Engineering B, volumes 69-70, 2000, pages 29-33, which is incorporated herein by reference. Another process for producing micro-cavity arrays is described by Li et al., in “Microfabrication of Thermoelectric Materials by Silicon Molding Process,” Sensors and Actuators A, volume 108, 2003, pages 97-102, which is incorporated herein by reference. The authors describe a process for fabricating thermoelectric micro-modules with densely aligned fine scale and high aspect ratio elements.